[Edaily Reporter SOYEON KIM ] SamsungElectronics held the “SAFE™ (Samsung Advanced Foundry Ecosystem) Forum 2026” at its Seocho headquarters on the 1st. At the event, SamsungElectronics unveiled its Design and Process Co-optimization (DTCO) strategy—a next-generation foundry (semiconductor contract manufacturing) technology—as well as its high-performance SRAM technology. The company also presented its future technology roadmap, outlining process innovation directions optimized for next-generation 2-nanometer processes and artificial intelligence (AI) semiconductors.

SamsungElectronics held this year’s SAFE Forum and Foundry Forum (SFF) concurrently, scaling back the events compared to previous years. This reflects the company’s continued strategy of focusing on “strengthening fundamentals” rather than expanding the scale of its foundry business. Launched in October 2019, the SAFE Forum is an event designed to share the latest technology trends with foundry partners and strengthen collaboration. This year’s event was also held behind closed doors.

Following its May session in San Jose, California, the Safe Forum was also held in Seoul on this day. Samsung Foundry shared its vision for the future of the semiconductor industry in the AI era and emphasized the importance of ecosystem collaboration. The company continues to stress that innovation in the AI era cannot be achieved through advanced process technology alone; rather, organic collaboration and integrated optimization across the entire semiconductor ecosystem are essential.

With the proliferation of AI semiconductors driving increased demand for GPUs and ASICs (application-specific integrated circuits), the market for leading-edge processes is also expected to grow rapidly. According to Omdia, the foundry market for 3-nanometer and below processes is projected to expand from $25.7 billion in 2025 to $101.9 billion in 2028.

Samsung Foundry is accelerating its efforts to secure major global clients in the AI and high-performance computing (HPC) sectors. Last year, SamsungElectronics signed its largest-ever foundry supply contract with Tesla, worth approximately 22.7 trillion won, and is also collaborating on the production of NVIDIA’s autonomous driving chips and Groq’s LPUs.

At this event, SamsungElectronics introduced its process and design innovation strategies to address the growing demand for AI semiconductors. The company unveiled its next-generation 2-nanometer process and process innovation roadmap optimized for AI semiconductors, and presented a technology roadmap designed to enhance its customers’ product competitiveness.

In particular, the company revealed plans to strengthen its competitiveness in SRAM technology, which is considered a key factor in improving AI semiconductor performance. While SRAM processes data faster than DRAM, its large cell size and complex circuit structure make it difficult to achieve high capacity. SamsungElectronics explained that it is continuously improving power efficiency, performance, and area competitiveness through its DTCO strategy—which simultaneously optimizes design and process—and high-performance SRAM technology, and is using this foundation to support the development of next-generation products for its AI semiconductor customers.

During his keynote speech that day, Shin Jong-shin, Head of the Design Platform Development Division at SamsungElectronics’ Foundry Business Division, stated, “SamsungElectronics will enhance its capacity to meet AI demand while actively communicating with customers and partners through the Safe Forum,” and “We are ramping up collaboration with global AI and high-performance computing (HPC) customers while also strengthening cooperation with domestic system semiconductor customers, and we will expand our role beyond foundry production to serve as a platform for the domestic system semiconductor industry,” he added.

Key partners, including AI fabless company Rebellion and electronic design automation (EDA) firm Siemens EDA, participated as speakers at the event. Park Sung-hyun, CEO of Rebellion, said, “We developed the ‘Rebel 100’ NPU based on SamsungElectronics’ 4-nanometer foundry process and advanced packaging,” adding, “We will collaborate in the AI semiconductor sector going forward and contribute to the development of sovereign AI.”

Jean-Marie Brunet, Senior Vice President of Siemens EDA, said, “Comprehensive support in the areas of yield, design verification, reliability, and packaging is essential for 2.5D and 3D heterogeneous chip integration,” adding, “Siemens EDA will support customers in rapidly implementing AI and HPC semiconductors using Samsung’s leading-edge processes.”

Approximately 400 representatives from customers and partner companies attended this year’s SAFE Forum. Twenty-one partner companies from fields such as EDA, intellectual property (IP), design solutions (DSP), virtual design (VDP), and advanced packaging (MDI) set up booths to showcase a variety of solutions for Samsung Foundry customers.

SamsungElectronics Foundry is also focusing its efforts on fostering the domestic system semiconductor ecosystem. SamsungElectronics is participating in the Manufacturing AI Transformation (M.AX) Alliance promoted by the Ministry of Trade, Industry and Energy, and the Foundry Business Division is pursuing the development of low-power, high-performance on-device AI semiconductors required for the automotive, home appliance, robotics, and defense sectors. Additionally, through the MPW (Multi-Project Wafer) program, it is reducing the initial development burden on domestic fabless companies and supporting prototype production and product validation.

Following the SAFE Forum, a networking dinner will be held to strengthen collaboration with partner companies. SamsungElectronics plans to transform the Foundry Forum into a VIP dinner event. Key SamsungElectronics executives, including the Head of the Foundry Business Division (President) and Nam Seok-woo, Chief Technology Officer (CTO) of the Foundry Business Division, are expected to attend.